author  Sam Lantinga <slouken@libsdl.org> 
Wed, 10 Jun 2009 13:34:20 +0000  
changeset 3186  51750b7a966f 
parent 3181  030899df1af5 
child 3187  e041d2c603fe 
permissions  rwrr 
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/* 
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SDL  Simple DirectMedia Layer 
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Copyright (C) 19972006 Sam Lantinga 
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4 

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This library is free software; you can redistribute it and/or 
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modify it under the terms of the GNU Lesser General Public 
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License as published by the Free Software Foundation; either 
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version 2.1 of the License, or (at your option) any later version. 
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9 

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This library is distributed in the hope that it will be useful, 
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but WITHOUT ANY WARRANTY; without even the implied warranty of 
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 
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Lesser General Public License for more details. 
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14 

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You should have received a copy of the GNU Lesser General Public 
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License along with this library; if not, write to the Free Software 
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 021101301 USA 
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Sam Lantinga 
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slouken@libsdl.org 
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*/ 
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/** 
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* \file SDL_atomic.h 
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* 
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* Atomic int and pointer magic 
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*/ 
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#ifndef _SDL_atomic_h_ 
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#define _SDL_atomic_h_ 
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#include "SDL_stdinc.h" 
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#include "SDL_platform.h" 
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#include "begin_code.h" 
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/* Set up for C function definitions, even when using C++ */ 
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#ifdef __cplusplus 
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/* *INDENTOFF* */ 
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extern "C" { 
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/* *INDENTON* */ 
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#endif 
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#if defined(__GNUC__) && (defined(i386)  defined(__i386__)  defined(__x86_64__)) 
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static __inline__ void 
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SDL_atomic_int_add(volatile int *atomic, int value) 
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{ 
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__asm__ __volatile__("lock;" "addl %1, %0":"=m"(*atomic) 
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:"ir"(value), "m"(*atomic)); 

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} 
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static __inline__ int 
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SDL_atomic_int_xchg_add(volatile int *atomic, int value) 
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{ 

56 
int rv; 

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__asm__ __volatile__("lock;" "xaddl %0, %1":"=r"(rv), "=m"(*atomic) 

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:"0"(value), "m"(*atomic)); 

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return rv; 

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} 
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static __inline__ SDL_bool 
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SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
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{ 
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int rv; 
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__asm__ __volatile__("lock;" "cmpxchgl %2, %1":"=a"(rv), "=m"(*atomic) 

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:"r"(newvalue), "m"(*atomic), "0"(oldvalue)); 

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return (SDL_bool) (rv == oldvalue); 

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} 
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static __inline__ SDL_bool 
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SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
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void *newvalue) 

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{ 
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void *rv; 
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__asm__ __volatile__("lock;" 

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# if defined(__x86_64__) 

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"cmpxchgq %q2, %1" 

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# else 
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"cmpxchgl %2, %1" 
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# endif 

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:"=a"(rv), "=m"(*atomic) 

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:"r"(newvalue), "m"(*atomic), "0"(oldvalue)); 

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return (SDL_bool) (rv == oldvalue); 

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} 
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#elif defined(__GNUC__) && defined(__alpha__) 
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# define ATOMIC_MEMORY_BARRIER (__asm__ __volatile__ ("mb" : : : "memory")) 
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# define ATOMIC_INT_CMP_XCHG(atomic,value) \ 
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({ \ 
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int rv,prev; \ 
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__asm__ __volatile__(" mb\n" \ 
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"1: ldl_l %0,%2\n" \ 
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" cmpeq %0,%3,%1\n" \ 
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" beq %1,2f\n" \ 
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" mov %4,%1\n" \ 
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" stl_c %1,%2\n" \ 
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" beq %1,1b\n" \ 
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" mb\n" \ 
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"2:" \ 
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: "=&r" (prev), \ 
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"=&r" (rv) \ 
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: "m" (*(atomic)), \ 
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"Ir" (oldvalue), \ 
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"Ir" (newvalue) \ 
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: "memory"); \ 
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(rv != 0); \ 
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}) 
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# if (SIZEOF_VOIDP == 4) 
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static __inline__ SDL_bool 
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SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
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void *newvalue) 

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{ 
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int rv; 
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void *prev; 

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__asm__ __volatile__(" mb\n" 

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"1: ldl_l %0,%2\n" 

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" cmpeq %0,%3,%1\n" 

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" beq $1,2f\n" 

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" mov %4,%1\n" 

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" stl_c %1,%2\n" 

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" beq %1,1b\n" 

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" mb\n" "2:":"=&r"(prev), "=&r"(rv) 

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:"m"(*atomic), "Ir"(oldvalue), "Ir"(newvalue) 

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:"memory"); 

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return (SDL_bool) (rv != 0); 

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} 
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# elif (SIZEOF_VOIDP == 8) 
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static __inline__ SDL_bool 
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SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
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void *newvalue) 

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{ 
3186  133 
int rv; 
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void *prev; 

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__asm__ __volatile__(" mb\n" 

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"1: ldq_l %0,%2\n" 

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" cmpeq %0,%3,%1\n" 

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" beq %1,2f\n" 

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" mov %4,%1\n" 

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" stq_c %1,%2\n" 

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" beq %1,1b\n" 

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" mb\n" "2:":"=&r"(prev), "=&r"(rv) 

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:"m"(*atomic), "Ir"(oldvalue), "Ir"(newvalue) 

144 
:"memory"); 

145 
return (SDL_bool) (rv != 0); 

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} 
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# else 
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# error "Your system has an unsupported pointer size" 
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# endif /* SIZEOF_VOIDP */ 

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#elif defined(__GNUC__) && defined(__sparc__) 
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# define ATOMIC_MEMORY_BARRIER \ 
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(__asm__ __volatile__("membar #LoadLoad  #LoadStore" \ 
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"  #StoreLoad  #StoreStore" : : : "memory")) 
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# define ATOMIC_INT_CMP_XCHG(atomic,oldvalue,newvalue) \ 
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({ \ 
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int rv; \ 
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__asm__ __volatile__("cas [%4], %2, %0" \ 
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: "=r" (rv), "=m" (*(atomic)) \ 
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: "r" (oldvalue), "m" (*(atomic)), \ 
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"r" (atomic), "0" (newvalue)); \ 
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rv == oldvalue; \ 
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}) 
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# if (SIZEOF_VOIDP == 4) 
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static __inline__ SDL_bool 
3186  166 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
167 
void *newvalue) 

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{ 
3186  169 
void *rv; 
170 
__asm__ __volatile__("cas [%4], %2, %0":"=r"(rv), "=m"(*atomic) 

171 
:"r"(oldvalue), 

172 
"m"(*atomic), "r"(atomic), "0"(newvalue)); 

173 
return (SDL_bool) (rv == oldvalue); 

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} 
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# elif (SIZEOF_VOIDP == 8) 
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static __inline__ SDL_bool 
3186  177 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
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void *newvalue) 

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{ 
3186  180 
void *rv; 
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void **a = atomic; 

182 
__asm__ __volatile__("casx [%4], %2, %0":"=r"(rv), "=m"(*a) 

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:"r"(oldvalue), "m"(*a), "r"(a), "0"(newvalue)); 

184 
return (SDL_bool) (rv == oldvalue); 

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} 
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# else 
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# error "Your system has an unsupported pointer size" 
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# endif /* SIZEOF_VOIDP */ 
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#elif defined(__GNUC__) && (defined(__POWERPC__)  defined(__powerpc__)  defined(__ppc__)  defined(_M_PPC)) 
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# define ATOMIC_MEMORY_BARRIER \ 
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(__asm__ __volatile__ ("sync" : : : "memory")) 
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static __inline__ void 
3186  193 
SDL_atomic_int_add(volatile int *atomic, int value) 
194 
{ 

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int rv, tmp; 

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__asm__ __volatile__("1: lwarx %0, 0, %3\n" 

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" add %1, %0, %4\n" 

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" stwcx. %1, 0, %3\n" 

199 
" bne 1b":"=&b"(rv), "=&r"(tmp), "=m"(*atomic) 

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:"b"(atomic), "r"(value), "m"(*atomic) 

201 
:"cr0", "memory"); 

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} 
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203 

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static __inline__ int 
3186  205 
SDL_atomic_int_xchg_add(volatile int *atomic, int value) 
206 
{ 

207 
int rv, tmp; 

208 
__asm__ __volatile__("1: lwarx %0, 0, %3\n" 

209 
" add %1, %0, %4\n" 

210 
" stwcx. %1, 0, %3\n" 

211 
" bne 1b":"=&b"(rv), "=&r"(tmp), "=m"(*atomic) 

212 
:"b"(atomic), "r"(value), "m"(*atomic) 

213 
:"cr0", "memory"); 

214 
return rv; 

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} 
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# if (SIZEOF_VOIDP == 4) 
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static __inline__ SDL_bool 
3186  219 
SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
220 
{ 

221 
int rv; 

222 
__asm__ __volatile__(" sync\n" 

223 
"1: lwarx %0, 0, %1\n" 

224 
" subf. %0, %2, %0\n" 

225 
" bne 2f\n" 

226 
" stwcx. %3, 0, %1\n" 

227 
" bne 1b\n" "2: isync":"=&r"(rv) 

228 
:"b"(atomic), "r"(oldvalue), "r":"cr0", "memory"); 

229 
return (SDL_bool) (rv == 0); 

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} 
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static __inline__ SDL_bool 
3186  233 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
234 
void *newvalue) 

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{ 
3186  236 
void *rv; 
237 
__asm__ __volatile__("sync\n" 

238 
"1: lwarx %0, 0, %1\n" 

239 
" subf. %0, %2, %0\n" 

240 
" bne 2f\n" 

241 
" stwcx. %3, 0, %1\n" 

242 
" bne 1b\n" "2: isync":"=&r"(rv) 

243 
:"b"(atomic), "r"(oldvalue), "r"(newvalue) 

244 
:"cr0", "memory"); 

245 
return (SDL_bool) (rv == 0); 

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} 
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# elif (SIZEOF_VOIDP == 8) 
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static __inline__ SDL_bool 
3186  249 
SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
250 
{ 

251 
int rv; 

252 
__asm__ __volatile__(" sync\n" 

253 
"1: lwarx %0, 0, %1\n" 

254 
" extsw %0, %0\n" 

255 
" subf. %0, %2, %0\n" 

256 
" bne 2f\n" 

257 
" stwcx. %3, 0, %1\n" 

258 
" bne 1b\n" "2: isync":"=&r"(rv) 

259 
:"b"(atomic), "r"(oldvalue), "r":"cr0", "memory"); 

260 
return (SDL_bool) (rv == 0); 

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} 
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static __inline__ SDL_bool 
3186  264 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
265 
void *newvalue) 

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{ 
3186  267 
void *rv; 
268 
__asm__ __volatile__("sync\n" 

269 
"1: ldarx %0, 0, %1\n" 

270 
" subf. %0, %2, %0\n" 

271 
" bne 2f\n" 

272 
" stdcx. %3, 0, %1\n" 

273 
" bne 1b\n" "2: isync":"=&r"(rv) 

274 
:"b"(atomic), "r"(oldvalue), "r"(newvalue) 

275 
:"cr0", "memory"); 

276 
return (SDL_bool) (rv == 0); 

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} 
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# else 
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# error "Your system has an unsupported pointer size" 
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# endif /* SIZEOF_VOIDP */ 
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#elif defined(__GNUC__) && (defined(__IA64__)  defined(__ia64__)) 
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# define ATOMIC_MEMORY_BARRIER (__sync_synchronize()) 
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# define SDL_atomic_int_xchg_add(atomic, value) \ 
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(__sync_fetch_and_add((atomic),(value))) 
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# define SDL_atomic_int_add(atomic, value) \ 
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((void)__sync_fetch_and_add((atomic),(value))) 
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# define SDL_atomic_int_cmp_xchg(atomic,oldvalue,newvalue) \ 
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(__sync_bool_compare_and_swap((atomic),(oldvalue),(newvalue))) 
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# define SDL_atomic_ptr_cmp_xchg(atomic,oldvalue,newvalue) \ 
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(__sync_bool_compare_and_swap((long*)(atomic),(long)(oldvalue),(long)(newvalue))) 
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#elif defined(__GNUC__) && defined(__LINUX__) && (defined(__mips__)  defined(__MIPS__)) 
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static __inline__ int 
3186  293 
SDL_atomic_int_xchg_add(volatile int *atomic, int value) 
294 
{ 

295 
int rv, tmp; 

296 
__asm__ __volatile__("1: \n" 

297 
".set push \n" 

298 
".set mips2 \n" 

299 
"ll %0,%3 \n" 

300 
"addu %1,%4,%0 \n" 

301 
"sc %1,%2 \n" 

302 
".set pop \n" 

303 
"beqz %1,1b \n":"=&r"(rv), 

304 
"=&r"(tmp), "=m"(*atomic) 

305 
:"m"(*atomic), "r"(value) 

306 
:"memory"); 

307 
return rv; 

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} 
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309 

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static __inline__ void 
3186  311 
SDL_atomic_int_add(volatile int *atomic, int value) 
312 
{ 

313 
int rv; 

314 
__asm__ __volatile__("1: \n" 

315 
".set push \n" 

316 
".set mips2 \n" 

317 
"ll %0,%2 \n" 

318 
"addu %0,%3,%0 \n" 

319 
"sc %0,%1 \n" 

320 
".set pop \n" 

321 
"beqz %0,1b \n":"=&r"(rv), "=m"(*atomic) 

322 
:"m"(*atomic), "r"(value) 

323 
:"memory"); 

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} 
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325 

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static __inline__ SDL_bool 
3186  327 
SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
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{ 
3186  329 
int rv; 
330 
__asm__ __volatile__(" .set push \n" 

331 
" .set noat \n" 

332 
" .set mips3 \n" 

333 
"1: ll %0, %2 \n" 

334 
" bne %0, %z3, 2f \n" 

335 
" .set mips0 \n" 

336 
" move $1, %z4 \n" 

337 
" .set mips3 \n" 

338 
" sc $1, %1 \n" 

339 
" beqz $1, 1b \n" 

340 
" sync \n" 

341 
"2: \n" 

342 
" .set pop \n":"=&r"(rv), "=R"(*atomic) 

343 
:"R"(*atomic), "Jr"(oldvalue), "Jr"(newvalue) 

344 
:"memory"); 

345 
return (SDL_bool) rv; 

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346 
} 
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347 

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static __inline__ SDL_bool 
3186  349 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
350 
void *newvalue) 

351 
{ 

352 
int rv; 

353 
__asm__ __volatile__(" .set push \n" 

354 
" .set noat \n" " .set mips3 \n" 

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355 
# if defined(__mips64) 
3186  356 
"1: lld %0, %2 \n" 
357 
# else 

358 
"1: ll %0, %2 \n" 

359 
# endif 

360 
" bne %0, %z3, 2f \n" " move $1, %z4 \n" 

361 
# if defined(__mips64) 

362 
" sc $1, %1 \n" 

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363 
# else 
3186  364 
" scd $1, %1 \n" 
365 
# endif 

366 
" beqz $1, 1b \n" 

367 
" sync \n" 

368 
"2: \n" 

369 
" .set pop \n":"=&r"(rv), "=R"(*atomic) 

370 
:"R"(*atomic), "Jr"(oldvalue), "Jr"(newvalue) 

371 
:"memory"); 

372 
return (SDL_bool) rv; 

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373 
} 
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374 
#elif defined(__GNUC__) && defined(__m68k__) 
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375 
static __inline__ int 
3186  376 
SDL_atomic_int_xchg_add(volatile int *atomic, int value) 
377 
{ 

378 
int rv = *atomic; 

379 
int tmp; 

380 
__asm__ __volatile__("1: move%.l %0,%1 \n" 

381 
" add%.l %2,%1 \n" 

382 
" cas%.l %0,%1,%3 \n" 

383 
" jbne 1b \n":"=d"(rv), "=&d"(tmp) 

384 
:"d"(value), "m"(*atomic), "0"(rv) 

385 
:"memory"); 

386 
return (SDL_bool) rv; 

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387 
} 
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388 

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389 
static __inline__ void 
3186  390 
SDL_atomic_int_add(volatile int *atomic, int value) 
391 
{ 

392 
__asm__ __volatile__("add%.l %0,%1"::"id"(value), "m"(*atomic) 

393 
:"memory"); 

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394 
} 
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395 

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396 
static __inline__ SDL_bool 
3186  397 
SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
398 
{ 

399 
char rv; 

400 
int readvalue; 

401 
__asm__ __volatile__("cas%.l %2,%3,%1\n" 

402 
"seq %0":"=dm"(rv), "=m"(*atomic), "=d"(readvalue) 

403 
:"d"(newvalue), "m"(*atomic), "2"(oldvalue)); 

404 
return (SDL_bool) rv; 

3180
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405 
} 
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406 

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407 
static __inline__ SDL_bool 
3186  408 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
409 
void *newvalue) 

3180
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410 
{ 
3186  411 
char rv; 
412 
int readvalue; 

413 
__asm__ __volatile__("cas%.l %2,%3,%1\n" 

414 
"seq %0":"=dm"(rv), "=m"(*atomic), "=d"(readvalue) 

415 
:"d"(newvalue), "m"(*atomic), "2"(oldvalue)); 

416 
return (SDL_bool) rv; 

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417 
} 
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418 
#elif defined(__GNUC__) && defined(__s390__) 
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419 
# define ATOMIC_INT_CMP_XCHG(atomic,oldvalue,newvalue) \ 
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420 
({ \ 
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421 
int rv = oldvalue; \ 
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422 
__asm__ __volatile__("cs %0, %2, %1" \ 
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423 
: "+d" (rv), \ 
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424 
"=Q" (*(atomic)) \ 
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425 
: "d" (newvalue), \ 
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426 
"m" (*(atomic)) \ 
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427 
: "cc"); \ 
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428 
rv == oldvalue; \ 
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429 
}) 
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430 
# if (SIZEOF_VOIDP == 4) 
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431 
static __inline__ SDL_bool 
3186  432 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
433 
void *newvalue) 

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434 
{ 
3186  435 
void *rv = oldvalue; 
436 
__asm__ __volatile__("cs %0, %2, %1":"+d"(rv), "=Q"(*atomic) 

437 
:"d"(newvalue), "m"(*atomic) 

438 
:"cc"); 

439 
return (SDL_bool) (rv == oldvalue); 

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440 
} 
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441 
# elif (SIZEOF_VOIDP == 8) 
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442 
static __inline__ SDL_bool 
3186  443 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
444 
void *newvalue) 

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445 
{ 
3186  446 
void *rv = oldvalue; 
447 
void **a = atomic; 

448 
__asm__ __volatile__("csg %0, %2, %1":"+d"(rv), "=Q"(*a) 

449 
:"d"((long) (newvalue)), "m"(*a) 

450 
:"cc"); 

451 
return (SDL_bool) (rv == oldvalue); 

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452 
} 
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453 
# else 
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454 
# error "Your system has an unsupported pointer size" 
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455 
# endif /* SIZEOF_VOIDP */ 
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456 
#elif defined(__WIN32__) 
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457 
# include <windows.h> 
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458 
static __inline__ int 
3186  459 
SDL_atomic_int_xchg_add(volatile int *atomic, int value) 
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460 
{ 
3186  461 
return InterlockedExchangeAdd(atomic, value); 
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462 
} 
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463 

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464 
static __inline__ void 
3186  465 
SDL_atomic_int_add(volatile int *atomic, int value) 
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466 
{ 
3186  467 
InterlockedExchangeAdd(atomic, value); 
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468 
} 
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469 

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470 
# if (WINVER > 0X0400) 
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471 
static __inline__ SDL_bool 
3186  472 
SDL_atmoic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
3180
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473 
{ 
3186  474 
return (SDL_bool) (InterlockedCompareExchangePointer((PVOID *) atomic, 
475 
(PVOID) newvalue, 

476 
(PVOID) oldvalue) == 

477 
oldvalue); 

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478 
} 
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479 

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480 

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static __inline__ SDL_bool 
3186  482 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
483 
void *newvalue) 

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484 
{ 
3186  485 
return (InterlockedCompareExchangePointer(atomic, newvalue, oldvalue) == 
486 
oldvalue); 

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487 
} 
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488 
# else /* WINVER <= 0x0400 */ 
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489 
# if (SIZEOF_VOIDP != 4) 
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490 
# error "InterlockedCompareExchangePointer needed" 
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491 
# endif 
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492 

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493 
static __inline__ SDL_bool 
3186  494 
SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
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495 
{ 
3186  496 
return (InterlockedCompareExchange(atomic, newvalue, oldvalue) == 
497 
oldvalue); 

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498 
} 
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499 

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500 
static __inline__ SDL_bool 
3186  501 
SDL_atomic_ptr_cmp_xchg(volatile void **atomic, void *oldvalue, 
502 
void *newvalue) 

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503 
{ 
3186  504 
return (InterlockedCompareExchange(atomic, newvalue, oldvalue) == 
505 
oldvalue); 

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506 
} 
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507 
# endif 
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508 
#else /* when all else fails */ 
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509 
# define SDL_ATOMIC_OPS_NOT_SUPPORTED 
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510 
# warning "Atomic Ops for this platform not supported!" 
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511 
static __inline__ int 
3186  512 
SDL_atomic_int_xchg_add(volatile int *atomic, int value) 
513 
{ 

514 
int rv = *atomic; 

515 
*(atomic) += value; 

516 
return rv; 

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517 
} 
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518 

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519 
static __inline__ SDL_bool 
3186  520 
SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
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521 
{ 
3186  522 
return (*atomic == oldvalue) ? 
523 
((*atomic = newvalue), SDL_TRUE) : SDL_FALSE; 

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524 
} 
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525 

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526 
static __inline__ void 
3186  527 
SDL_atomic_int_add(volatile int *atomic, int value) 
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528 
{ 
3186  529 
*atomic += value; 
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530 
} 
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531 
#endif /* arch & platforms */ 
3186  532 

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533 
#ifdef ATOMIC_INT_CMP_XCHG 
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534 
static __inline__ SDL_bool 
3186  535 
SDL_atomic_int_cmp_xchg(volatile int *atomic, int oldvalue, int newvalue) 
3180
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536 
{ 
3186  537 
return (SDL_bool) ATOMIC_INT_CMP_XCHG(atomic, oldvalue, newvalue); 
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538 
} 
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539 

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540 
static __inline__ int 
3186  541 
SDL_atomic_int_xchg_add(volatile int *atomic, int value) 
542 
{ 

543 
int rv; 

544 
do 

545 
rv = *atomic; 

546 
while (!ATOMIC_INT_CMP_XCHG(atomic, rv, rv + value)); 

547 
return rv; 

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548 
} 
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549 

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550 
static __inline__ void 
3186  551 
SDL_atomic_int_add(volatile int *atomic, int value) 
3180
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552 
{ 
3186  553 
int rv; 
554 
do 

555 
rv = *atomic; 

556 
while (!ATOMIC_INT_CMP_XCHG(atomic, rv, rv + value)); 

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557 
} 
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558 
#endif /* ATOMIC_CMP_XCHG */ 
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559 

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560 
#ifdef ATOMIC_MEMORY_BARRIER 
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561 
# define SDL_atomic_int_get(atomic) \ 
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562 
(ATOMIC_MEMORY_BARRIER,*(atomic)) 
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563 
# define SDL_atomic_int_set(atomic,value) \ 
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564 
(*(atomic)=value,ATOMIC_MEMORY_BARRIER) 
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565 
#else 
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566 
# define SDL_atomic_int_get(atomic) (*(atomic)) 
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567 
# define SDL_atomic_int_set(atomic, newvalue) ((void)(*(atomic) = (newvalue))) 
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568 
#endif /* MEMORY_BARRIER_NEEDED */ 
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569 

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570 
#define SDL_atomic_int_inc(atomic) (SDL_atomic_int_add((atomic),1)) 
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571 
#define SDL_atomic_int_dec_test(atomic) (SDL_atomic_int_xchg_add((atomic),1) == 1) 
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572 

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573 
/* Ends C function definitions when using C++ */ 
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574 
#ifdef __cplusplus 
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575 
/* *INDENTOFF* */ 
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576 
} 
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577 
/* *INDENTON* */ 
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578 
#endif 
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579 

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580 
#include "close_code.h" 
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581 

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582 
#endif /* _SDL_atomic_h_ */ 
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583 

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584 
/* vi: set ts=4 sw=4 expandtab: */ 