Mon, 20 Jul 2020 20:07:06 -0400 d3d11: Only build the D3D11 glue code on Windows.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 20:07:06 -0400] rev 1296
d3d11: Only build the D3D11 glue code on Windows.
Mon, 20 Jul 2020 20:06:34 -0400 cmake: build the HLSL profile by default.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 20:06:34 -0400] rev 1295
cmake: build the HLSL profile by default.
Mon, 20 Jul 2020 19:24:46 -0400 Rebuilt the lexer with a much newer re2c.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 19:24:46 -0400] rev 1294
Rebuilt the lexer with a much newer re2c.
Mon, 20 Jul 2020 19:22:41 -0400 glsl: Correct RCP and RSQ output.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 19:22:41 -0400] rev 1293
glsl: Correct RCP and RSQ output.
Mon, 20 Jul 2020 19:02:27 -0400 glsl: Fix compiler warning.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 19:02:27 -0400] rev 1292
glsl: Fix compiler warning.
Mon, 20 Jul 2020 18:53:54 -0400 RSQ opcode requires replicate swizzle.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 18:53:54 -0400] rev 1291
RSQ opcode requires replicate swizzle.
Mon, 20 Jul 2020 16:14:43 -0400 The assembler needs to accept an implicit ".x" swizzle on RCP's source arg.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 16:14:43 -0400] rev 1290
The assembler needs to accept an implicit ".x" swizzle on RCP's source arg.
Mon, 20 Jul 2020 15:37:27 -0400 Minor replicate_swizzle optimization.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 15:37:27 -0400] rev 1289
Minor replicate_swizzle optimization. Do it in two tests instead of three, and with two shifts instead of five.
Mon, 20 Jul 2020 15:35:34 -0400 Clean up assembler writemask parsing a little.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 15:35:34 -0400] rev 1288
Clean up assembler writemask parsing a little.
Mon, 20 Jul 2020 15:18:14 -0400 List default writemasks for instructions.
Ryan C. Gordon <icculus@icculus.org> [Mon, 20 Jul 2020 15:18:14 -0400] rev 1287
List default writemasks for instructions. This lets this line of assembly generate correct code: m3x3 r7, r4, c28 As this is legal, but the bytecode validator will throw it out for having a writemask of .xyzw on r7 when it requires .xyz. The assembler needs to know what the implicit writemask should be in this circumstance. (Some instructions might still be incorrect, but are left at the default of a full .xyzw writemask, so they continue to act as before until corrected.)
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