Added support for hardware accelerated NVidia driver on framebuffer console
authorSam Lantinga <slouken@libsdl.org>
Tue, 31 Jul 2001 20:08:51 +0000
changeset 133 5d4bafca35cd
parent 132 2604a7be65af
child 134 f1550e1c4916
Added support for hardware accelerated NVidia driver on framebuffer console Still missing colorkey and alpha blit support
src/video/fbcon/Makefile.am
src/video/fbcon/SDL_fbriva.c
src/video/fbcon/SDL_fbriva.h
src/video/fbcon/SDL_fbvideo.c
src/video/fbcon/riva_mmio.h
src/video/fbcon/riva_regs.h
--- a/src/video/fbcon/Makefile.am	Tue Jul 31 06:08:11 2001 +0000
+++ b/src/video/fbcon/Makefile.am	Tue Jul 31 20:08:51 2001 +0000
@@ -18,8 +18,12 @@
 	SDL_fbmatrox.h		\
 	SDL_fbmouse.c		\
 	SDL_fbmouse_c.h		\
+	SDL_fbriva.c		\
+	SDL_fbriva.h		\
 	SDL_fbvideo.c		\
 	3dfx_mmio.h		\
 	3dfx_regs.h		\
 	matrox_mmio.h		\
-	matrox_regs.h
+	matrox_regs.h		\
+	riva_mmio.h		\
+	riva_regs.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/video/fbcon/SDL_fbriva.c	Tue Jul 31 20:08:51 2001 +0000
@@ -0,0 +1,230 @@
+/*
+	SDL - Simple DirectMedia Layer
+	Copyright (C) 1997, 1998, 1999, 2000, 2001  Sam Lantinga
+
+	This library is free software; you can redistribute it and/or
+	modify it under the terms of the GNU Library General Public
+	License as published by the Free Software Foundation; either
+	version 2 of the License, or (at your option) any later version.
+
+	This library is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+	Library General Public License for more details.
+
+	You should have received a copy of the GNU Library General Public
+	License along with this library; if not, write to the Free
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	Sam Lantinga
+	slouken@devolution.com
+*/
+
+#ifdef SAVE_RCSID
+static char rcsid =
+ "@(#) $Id$";
+#endif
+
+#include "SDL_types.h"
+#include "SDL_video.h"
+#include "SDL_blit.h"
+#include "SDL_fbriva.h"
+#include "riva_mmio.h"
+#include "riva_regs.h"
+
+#define PGRAPH_OFFSET	0x00400000
+#define FIFO_OFFSET	0x00800000
+#define ROP_OFFSET	FIFO_OFFSET+0x00000000
+#define CLIP_OFFSET	FIFO_OFFSET+0x00002000
+#define PATT_OFFSET	FIFO_OFFSET+0x00004000
+#define PIXMAP_OFFSET	FIFO_OFFSET+0x00006000
+#define BLT_OFFSET	FIFO_OFFSET+0x00008000
+#define BITMAP_OFFSET	FIFO_OFFSET+0x0000A000
+#define LINE_OFFSET	FIFO_OFFSET+0x0000C000
+#define TRI03_OFFSET	FIFO_OFFSET+0x0000E000
+#define PCIO_OFFSET	0x00601000
+
+static int FifoEmptyCount = 0;
+static int FifoFreeCount = 0;
+
+/* Wait for vertical retrace */
+static void WaitVBL(_THIS)
+{
+	volatile Uint8 *port = (Uint8 *)(mapped_io + PCIO_OFFSET + 0x3DA);
+
+	while (  (*port & 0x08) )
+		;
+	while ( !(*port & 0x08) )
+		;
+}
+static void NV3WaitIdle(_THIS)
+{
+	RivaRop *Rop = (RivaRop *)(mapped_io + ROP_OFFSET);
+	while ( (Rop->FifoFree < FifoEmptyCount) ||
+	        (*(mapped_io + PGRAPH_OFFSET + 0x000006B0) & 0x01) )
+		;
+}
+static void NV4WaitIdle(_THIS)
+{
+	RivaRop *Rop = (RivaRop *)(mapped_io + ROP_OFFSET);
+	while ( (Rop->FifoFree < FifoEmptyCount) ||
+	        (*(mapped_io + PGRAPH_OFFSET + 0x00000700) & 0x01) )
+		;
+}
+
+/* Sets video mem colorkey and accelerated blit function */
+static int SetHWColorKey(_THIS, SDL_Surface *surface, Uint32 key)
+{
+	return(0);
+}
+
+/* Sets per surface hardware alpha value */
+static int SetHWAlpha(_THIS, SDL_Surface *surface, Uint8 value)
+{
+	return(0);
+}
+
+static int FillHWRect(_THIS, SDL_Surface *dst, SDL_Rect *rect, Uint32 color)
+{
+	int dstX, dstY;
+	int dstW, dstH;
+	RivaBitmap *Bitmap = (RivaBitmap *)(mapped_io + BITMAP_OFFSET);
+
+	/* Don't blit to the display surface when switched away */
+	if ( dst == this->screen ) {
+		SDL_mutexP(hw_lock);
+	}
+
+	/* Set up the X/Y base coordinates */
+	dstW = rect->w;
+	dstH = rect->h;
+	FB_dst_to_xy(this, dst, &dstX, &dstY);
+
+	/* Adjust for the current rectangle */
+	dstX += rect->x;
+	dstY += rect->y;
+
+	RIVA_FIFO_FREE(Bitmap, 1);
+	Bitmap->Color1A = color;
+
+	RIVA_FIFO_FREE(Bitmap, 2);
+	Bitmap->UnclippedRectangle[0].TopLeft     = (dstX << 16) | dstY; 
+	Bitmap->UnclippedRectangle[0].WidthHeight = (dstW << 16) | dstH;
+
+	FB_AddBusySurface(dst);
+
+	if ( dst == this->screen ) {
+		SDL_mutexV(hw_lock);
+	}
+	return(0);
+}
+
+static int HWAccelBlit(SDL_Surface *src, SDL_Rect *srcrect,
+                       SDL_Surface *dst, SDL_Rect *dstrect)
+{
+	SDL_VideoDevice *this = current_video;
+	int srcX, srcY;
+	int dstX, dstY;
+	int dstW, dstH;
+	RivaScreenBlt *Blt = (RivaScreenBlt *)(mapped_io + BLT_OFFSET);
+
+	/* FIXME: For now, only blit to display surface */
+	if ( dst->pitch != SDL_VideoSurface->pitch ) {
+		return(src->map->sw_blit(src, srcrect, dst, dstrect));
+	}
+
+	/* Don't blit to the display surface when switched away */
+	if ( dst == this->screen ) {
+		SDL_mutexP(hw_lock);
+	}
+
+	/* Calculate source and destination base coordinates (in pixels) */
+	dstW = dstrect->w;
+	dstH = dstrect->h;
+	FB_dst_to_xy(this, src, &srcX, &srcY);
+	FB_dst_to_xy(this, dst, &dstX, &dstY);
+
+	/* Adjust for the current blit rectangles */
+	srcX += srcrect->x;
+	srcY += srcrect->y;
+	dstX += dstrect->x;
+	dstY += dstrect->y;
+
+	RIVA_FIFO_FREE(Blt, 3);
+	Blt->TopLeftSrc  = (srcY << 16) | srcX;
+	Blt->TopLeftDst  = (dstY << 16) | dstX;
+	Blt->WidthHeight = (dstH  << 16) | dstW;
+
+	FB_AddBusySurface(src);
+	FB_AddBusySurface(dst);
+
+	if ( dst == this->screen ) {
+		SDL_mutexV(hw_lock);
+	}
+	return(0);
+}
+
+static int CheckHWBlit(_THIS, SDL_Surface *src, SDL_Surface *dst)
+{
+	int accelerated;
+
+	/* Set initial acceleration on */
+	src->flags |= SDL_HWACCEL;
+
+	/* Set the surface attributes */
+	if ( (src->flags & SDL_SRCALPHA) == SDL_SRCALPHA ) {
+		if ( ! this->info.blit_hw_A ) {
+			src->flags &= ~SDL_HWACCEL;
+		}
+	}
+	if ( (src->flags & SDL_SRCCOLORKEY) == SDL_SRCCOLORKEY ) {
+		if ( ! this->info.blit_hw_CC ) {
+			src->flags &= ~SDL_HWACCEL;
+		}
+	}
+
+	/* Check to see if final surface blit is accelerated */
+	accelerated = !!(src->flags & SDL_HWACCEL);
+	if ( accelerated ) {
+		src->map->hw_blit = HWAccelBlit;
+	}
+	return(accelerated);
+}
+
+void FB_RivaAccel(_THIS, __u32 card)
+{
+	RivaRop *Rop = (RivaRop *)(mapped_io + ROP_OFFSET);
+
+	/* We have hardware accelerated surface functions */
+	this->CheckHWBlit = CheckHWBlit;
+	wait_vbl = WaitVBL;
+	switch (card) {
+	    case FB_ACCEL_NV3:
+		wait_idle = NV3WaitIdle;
+		break;
+	    case FB_ACCEL_NV4:
+		wait_idle = NV4WaitIdle;
+		break;
+	    default:
+		/* Hmm... FIXME */
+		break;
+	}
+	FifoEmptyCount = Rop->FifoFree;
+
+	/* The Riva has an accelerated color fill */
+	this->info.blit_fill = 1;
+	this->FillHWRect = FillHWRect;
+
+	/* The Riva has accelerated normal and colorkey blits. */
+	this->info.blit_hw = 1;
+#if 0 /* Not yet implemented? */
+	this->info.blit_hw_CC = 1;
+	this->SetHWColorKey = SetHWColorKey;
+#endif
+
+#if 0 /* Not yet implemented? */
+	/* The Riva has an accelerated alpha blit */
+	this->info.blit_hw_A = 1;
+	this->SetHWAlpha = SetHWAlpha;
+#endif
+}
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/video/fbcon/SDL_fbriva.h	Tue Jul 31 20:08:51 2001 +0000
@@ -0,0 +1,33 @@
+/*
+	SDL - Simple DirectMedia Layer
+	Copyright (C) 1997, 1998, 1999, 2000, 2001  Sam Lantinga
+
+	This library is free software; you can redistribute it and/or
+	modify it under the terms of the GNU Library General Public
+	License as published by the Free Software Foundation; either
+	version 2 of the License, or (at your option) any later version.
+
+	This library is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+	Library General Public License for more details.
+
+	You should have received a copy of the GNU Library General Public
+	License along with this library; if not, write to the Free
+	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+	Sam Lantinga
+	slouken@devolution.com
+*/
+
+#ifdef SAVE_RCSID
+static char rcsid =
+ "@(#) $Id$";
+#endif
+
+/* Riva hardware acceleration for the SDL framebuffer console driver */
+
+#include "SDL_fbvideo.h"
+
+/* Set up the driver for Riva acceleration */
+extern void FB_RivaAccel(_THIS, __u32 card);
--- a/src/video/fbcon/SDL_fbvideo.c	Tue Jul 31 06:08:11 2001 +0000
+++ b/src/video/fbcon/SDL_fbvideo.c	Tue Jul 31 20:08:51 2001 +0000
@@ -49,6 +49,8 @@
 #include "SDL_fbevents_c.h"
 #include "SDL_fb3dfx.h"
 #include "SDL_fbmatrox.h"
+#include "SDL_fbriva.h"
+
 
 #if defined(i386) && defined(FB_TYPE_VGA_PLANES)
 #define VGA16_FBCON_SUPPORT
@@ -505,6 +507,13 @@
 #endif
 			FB_3DfxAccel(this, finfo.accel);
 			break;
+		    case FB_ACCEL_NV3:
+		    case FB_ACCEL_NV4:
+#ifdef FBACCEL_DEBUG
+			printf("NVidia hardware accelerator!\n");
+#endif
+			FB_RivaAccel(this, finfo.accel);
+			break;
 		    default:
 #ifdef FBACCEL_DEBUG
 			printf("Unknown hardware accelerator.\n");
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/video/fbcon/riva_mmio.h	Tue Jul 31 20:08:51 2001 +0000
@@ -0,0 +1,449 @@
+/***************************************************************************\
+|*                                                                           *|
+|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
+|*                                                                           *|
+|*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|
+|*     international laws.  Users and possessors of this source code are     *|
+|*     hereby granted a nonexclusive,  royalty-free copyright license to     *|
+|*     use this code in individual and commercial software.                  *|
+|*                                                                           *|
+|*     Any use of this source code must include,  in the user documenta-     *|
+|*     tion and  internal comments to the code,  notices to the end user     *|
+|*     as follows:                                                           *|
+|*                                                                           *|
+|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
+|*                                                                           *|
+|*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|
+|*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|
+|*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|
+|*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|
+|*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|
+|*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|
+|*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|
+|*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|
+|*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|
+|*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|
+|*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|
+|*                                                                           *|
+|*     U.S. Government  End  Users.   This source code  is a "commercial     *|
+|*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|
+|*     consisting  of "commercial  computer  software"  and  "commercial     *|
+|*     computer  software  documentation,"  as such  terms  are  used in     *|
+|*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|
+|*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|
+|*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|
+|*     all U.S. Government End Users  acquire the source code  with only     *|
+|*     those rights set forth herein.                                        *|
+|*                                                                           *|
+\***************************************************************************/
+
+#ifndef __RIVA_HW_H__
+#define __RIVA_HW_H__
+#define RIVA_SW_VERSION 0x00010003
+
+/*
+ * Typedefs to force certain sized values.
+ */
+typedef Uint8  U008;
+typedef Uint16 U016;
+typedef Uint32 U032;
+
+/*
+ * HW access macros.
+ */
+#define NV_WR08(p,i,d)  (((U008 *)(p))[i]=(d))
+#define NV_RD08(p,i)    (((U008 *)(p))[i])
+#define NV_WR16(p,i,d)  (((U016 *)(p))[(i)/2]=(d))
+#define NV_RD16(p,i)    (((U016 *)(p))[(i)/2])
+#define NV_WR32(p,i,d)  (((U032 *)(p))[(i)/4]=(d))
+#define NV_RD32(p,i)    (((U032 *)(p))[(i)/4])
+#define VGA_WR08(p,i,d) NV_WR08(p,i,d)
+#define VGA_RD08(p,i)   NV_RD08(p,i)
+
+/*
+ * Define supported architectures.
+ */
+#define NV_ARCH_03  0x03
+#define NV_ARCH_04  0x04
+#define NV_ARCH_10  0x10
+/***************************************************************************\
+*                                                                           *
+*                             FIFO registers.                               *
+*                                                                           *
+\***************************************************************************/
+
+/*
+ * Raster OPeration. Windows style ROP3.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BB];
+    U032 Rop3;
+} RivaRop;
+/*
+ * 8X8 Monochrome pattern.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BD];
+    U032 Shape;
+    U032 reserved03[0x001];
+    U032 Color0;
+    U032 Color1;
+    U032 Monochrome[2];
+} RivaPattern;
+/*
+ * Scissor clip rectangle.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BB];
+    U032 TopLeft;
+    U032 WidthHeight;
+} RivaClip;
+/*
+ * 2D filled rectangle.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop[1];
+    U032 reserved01[0x0BC];
+    U032 Color;
+    U032 reserved03[0x03E];
+    U032 TopLeft;
+    U032 WidthHeight;
+} RivaRectangle;
+/*
+ * 2D screen-screen BLT.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BB];
+    U032 TopLeftSrc;
+    U032 TopLeftDst;
+    U032 WidthHeight;
+} RivaScreenBlt;
+/*
+ * 2D pixel BLT.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop[1];
+    U032 reserved01[0x0BC];
+    U032 TopLeft;
+    U032 WidthHeight;
+    U032 WidthHeightIn;
+    U032 reserved02[0x03C];
+    U032 Pixels;
+} RivaPixmap;
+/*
+ * Filled rectangle combined with monochrome expand.  Useful for glyphs.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BB];
+    U032 reserved03[(0x040)-1];
+    U032 Color1A;
+    struct
+    {
+        U032 TopLeft;
+        U032 WidthHeight;
+    } UnclippedRectangle[64];
+    U032 reserved04[(0x080)-3];
+    struct
+    {
+        U032 TopLeft;
+        U032 BottomRight;
+    } ClipB;
+    U032 Color1B;
+    struct
+    {
+        U032 TopLeft;
+        U032 BottomRight;
+    } ClippedRectangle[64];
+    U032 reserved05[(0x080)-5];
+    struct
+    {
+        U032 TopLeft;
+        U032 BottomRight;
+    } ClipC;
+    U032 Color1C;
+    U032 WidthHeightC;
+    U032 PointC;
+    U032 MonochromeData1C;
+    U032 reserved06[(0x080)+121];
+    struct
+    {
+        U032 TopLeft;
+        U032 BottomRight;
+    } ClipD;
+    U032 Color1D;
+    U032 WidthHeightInD;
+    U032 WidthHeightOutD;
+    U032 PointD;
+    U032 MonochromeData1D;
+    U032 reserved07[(0x080)+120];
+    struct
+    {
+        U032 TopLeft;
+        U032 BottomRight;
+    } ClipE;
+    U032 Color0E;
+    U032 Color1E;
+    U032 WidthHeightInE;
+    U032 WidthHeightOutE;
+    U032 PointE;
+    U032 MonochromeData01E;
+} RivaBitmap;
+/*
+ * 3D textured, Z buffered triangle.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BC];
+    U032 TextureOffset;
+    U032 TextureFormat;
+    U032 TextureFilter;
+    U032 FogColor;
+/* This is a problem on LynxOS */
+#ifdef Control
+#undef Control
+#endif
+    U032 Control;
+    U032 AlphaTest;
+    U032 reserved02[0x339];
+    U032 FogAndIndex;
+    U032 Color;
+    float ScreenX;
+    float ScreenY;
+    float ScreenZ;
+    float EyeM;
+    float TextureS;
+    float TextureT;
+} RivaTexturedTriangle03;
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BB];
+    U032 ColorKey;
+    U032 TextureOffset;
+    U032 TextureFormat;
+    U032 TextureFilter;
+    U032 Blend;
+/* This is a problem on LynxOS */
+#ifdef Control
+#undef Control
+#endif
+    U032 Control;
+    U032 FogColor;
+    U032 reserved02[0x39];
+    struct
+    {
+        float ScreenX;
+        float ScreenY;
+        float ScreenZ;
+        float EyeM;
+        U032 Color;
+        U032 Specular;
+        float TextureS;
+        float TextureT;
+    } Vertex[16];
+    U032 DrawTriangle3D;
+} RivaTexturedTriangle05;
+/*
+ * 2D line.
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop[1];
+    U032 reserved01[0x0BC];
+    U032 Color;             /* source color               0304-0307*/
+    U032 Reserved02[0x03e];
+    struct {                /* start aliased methods in array   0400-    */
+        U032 point0;        /* y_x S16_S16 in pixels            0-   3*/
+        U032 point1;        /* y_x S16_S16 in pixels            4-   7*/
+    } Lin[16];              /* end of aliased methods in array      -047f*/
+    struct {                /* start aliased methods in array   0480-    */
+        U032 point0X;       /* in pixels, 0 at left                0-   3*/
+        U032 point0Y;       /* in pixels, 0 at top                 4-   7*/
+        U032 point1X;       /* in pixels, 0 at left                8-   b*/
+        U032 point1Y;       /* in pixels, 0 at top                 c-   f*/
+    } Lin32[8];             /* end of aliased methods in array      -04ff*/
+    U032 PolyLin[32];       /* y_x S16_S16 in pixels         0500-057f*/
+    struct {                /* start aliased methods in array   0580-    */
+        U032 x;             /* in pixels, 0 at left                0-   3*/
+        U032 y;             /* in pixels, 0 at top                 4-   7*/
+    } PolyLin32[16];        /* end of aliased methods in array      -05ff*/
+    struct {                /* start aliased methods in array   0600-    */
+        U032 color;         /* source color                     0-   3*/
+        U032 point;         /* y_x S16_S16 in pixels            4-   7*/
+    } ColorPolyLin[16];     /* end of aliased methods in array      -067f*/
+} RivaLine;
+/*
+ * 2D/3D surfaces
+ */
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BE];
+    U032 Offset;
+} RivaSurface;
+typedef volatile struct
+{
+    U032 reserved00[4];
+    U016 FifoFree;
+    U016 Nop;
+    U032 reserved01[0x0BD];
+    U032 Pitch;
+    U032 RenderBufferOffset;
+    U032 ZBufferOffset;
+} RivaSurface3D;
+    
+/***************************************************************************\
+*                                                                           *
+*                        Virtualized RIVA H/W interface.                    *
+*                                                                           *
+\***************************************************************************/
+
+struct _riva_hw_inst;
+struct _riva_hw_state;
+/*
+ * Virtialized chip interface. Makes RIVA 128 and TNT look alike.
+ */
+typedef struct _riva_hw_inst
+{
+    /*
+     * Chip specific settings.
+     */
+    U032 Architecture;
+    U032 Version;
+    U032 CrystalFreqKHz;
+    U032 RamAmountKBytes;
+    U032 MaxVClockFreqKHz;
+    U032 RamBandwidthKBytesPerSec;
+    U032 EnableIRQ;
+    U032 IO;
+    U032 VBlankBit;
+    U032 FifoFreeCount;
+    U032 FifoEmptyCount;
+    /*
+     * Non-FIFO registers.
+     */
+    volatile U032 *PCRTC;
+    volatile U032 *PRAMDAC;
+    volatile U032 *PFB;
+    volatile U032 *PFIFO;
+    volatile U032 *PGRAPH;
+    volatile U032 *PEXTDEV;
+    volatile U032 *PTIMER;
+    volatile U032 *PMC;
+    volatile U032 *PRAMIN;
+    volatile U032 *FIFO;
+    volatile U032 *CURSOR;
+    volatile U032 *CURSORPOS;
+    volatile U032 *VBLANKENABLE;
+    volatile U032 *VBLANK;
+    volatile U008 *PCIO;
+    volatile U008 *PVIO;
+    volatile U008 *PDIO;
+    /*
+     * Common chip functions.
+     */
+    int  (*Busy)(struct _riva_hw_inst *);
+    void (*CalcStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *,int,int,int,int,int,int,int,int,int,int,int,int,int);
+    void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
+    void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
+    void (*SetStartAddress)(struct _riva_hw_inst *,U032);
+    void (*SetSurfaces2D)(struct _riva_hw_inst *,U032,U032);
+    void (*SetSurfaces3D)(struct _riva_hw_inst *,U032,U032);
+    int  (*ShowHideCursor)(struct _riva_hw_inst *,int);
+    void (*LockUnlock)(struct _riva_hw_inst *, int);
+    /*
+     * Current extended mode settings.
+     */
+    struct _riva_hw_state *CurrentState;
+    /*
+     * FIFO registers.
+     */
+    RivaRop                 *Rop;
+    RivaPattern             *Patt;
+    RivaClip                *Clip;
+    RivaPixmap              *Pixmap;
+    RivaScreenBlt           *Blt;
+    RivaBitmap              *Bitmap;
+    RivaLine                *Line;
+    RivaTexturedTriangle03  *Tri03;
+    RivaTexturedTriangle05  *Tri05;
+} RIVA_HW_INST;
+/*
+ * Extended mode state information.
+ */
+typedef struct _riva_hw_state
+{
+    U032 bpp;
+    U032 width;
+    U032 height;
+    U032 repaint0;
+    U032 repaint1;
+    U032 screen;
+    U032 pixel;
+    U032 horiz;
+    U032 arbitration0;
+    U032 arbitration1;
+    U032 vpll;
+    U032 pllsel;
+    U032 general;
+    U032 config;
+    U032 cursor0;
+    U032 cursor1;
+    U032 cursor2;
+    U032 offset0;
+    U032 offset1;
+    U032 offset2;
+    U032 offset3;
+    U032 pitch0;
+    U032 pitch1;
+    U032 pitch2;
+    U032 pitch3;
+} RIVA_HW_STATE;
+
+/*
+ * FIFO Free Count. Should attempt to yield processor if RIVA is busy.
+ */
+
+#define RIVA_FIFO_FREE(hwptr,cnt)                                  \
+{                                                                  \
+   while (FifoFreeCount < (cnt))                                   \
+	FifoFreeCount = hwptr->FifoFree >> 2;                      \
+   FifoFreeCount -= (cnt);                                         \
+}
+#endif /* __RIVA_HW_H__ */
+
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/video/fbcon/riva_regs.h	Tue Jul 31 20:08:51 2001 +0000
@@ -0,0 +1,47 @@
+/*
+    SDL - Simple DirectMedia Layer
+    Copyright (C) 1997, 1998, 1999, 2000, 2001  Sam Lantinga
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Library General Public
+    License as published by the Free Software Foundation; either
+    version 2 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Library General Public License for more details.
+
+    You should have received a copy of the GNU Library General Public
+    License along with this library; if not, write to the Free
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+    Sam Lantinga
+    slouken@devolution.com
+*/
+
+#ifdef SAVE_RCSID
+static char rcsid =
+ "@(#) $Id$";
+#endif
+
+#ifndef _RIVA_REGS_H
+#define _RIVA_REGS_H
+
+/* This information comes from the XFree86 NVidia hardware driver */
+
+/* mapped_io register offsets */
+#define PGRAPH_OFFSET	0x00400000
+#define FIFO_OFFSET	0x00800000
+#define ROP_OFFSET	FIFO_OFFSET+0x00000000
+#define CLIP_OFFSET	FIFO_OFFSET+0x00002000
+#define PATT_OFFSET	FIFO_OFFSET+0x00004000
+#define PIXMAP_OFFSET	FIFO_OFFSET+0x00006000
+#define BLT_OFFSET	FIFO_OFFSET+0x00008000
+#define BITMAP_OFFSET	FIFO_OFFSET+0x0000A000
+#define LINE_OFFSET	FIFO_OFFSET+0x0000C000
+#define TRI03_OFFSET	FIFO_OFFSET+0x0000E000
+#define PCIO_OFFSET	0x00601000
+
+#endif /* _RIVA_REGS_H */
+