Date: Tue, 30 Mar 2004 18:18:13 -0600
From: Tyler Montbriand
Subject: [SDL] Detecting Opteron CPU features
I can now get SDL_cpuinfo.c to detect the AMD Opteron's RDTSC, MMX, MMXEXT,
3DNOW, 3DNOWEXT, SSE, and SSE2 instruction set extensions under Linux. It
took one #ifdef'ed block of new asm code to account for the 64-bit flags
register, but the other two blocks worked fine without modification, just
needed to modify the #ifdef's a bit.
--- a/src/cpuinfo/SDL_cpuinfo.c Sun Apr 11 19:47:28 2004 +0000
+++ b/src/cpuinfo/SDL_cpuinfo.c Sun Apr 11 19:49:34 2004 +0000
@@ -81,6 +81,26 @@
:
: "%eax", "%ecx"
);
+#elif defined(__GNUC__) && defined(__x86_64__)
+/* Technically, if this is being compiled under __x86_64__ then it has
+CPUid by definition. But it's nice to be able to prove it. :) */
+ __asm__ (
+" pushfq # Get original EFLAGS \n"
+" popq %%rax \n"
+" movq %%rax,%%rcx \n"
+" xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
+" pushq %%rax # Save new EFLAGS value on stack \n"
+" popfq # Replace current EFLAGS value \n"
+" pushfq # Get new EFLAGS \n"
+" popq %%rax # Store new EFLAGS in EAX \n"
+" xorl %%ecx,%%eax # Can not toggle ID bit, \n"
+" jz 1f # Processor=80486 \n"
+" movl $1,%0 # We have CPUID support \n"
+"1: \n"
+ : "=m" (has_CPUID)
+ :
+ : "%rax", "%rcx"
+ );
#elif defined(_MSC_VER)
__asm {
pushfd ; Get original EFLAGS
@@ -103,7 +123,7 @@
static __inline__ int CPU_getCPUIDFeatures()
{
int features = 0;
-#if defined(__GNUC__) && defined(i386)
+#if defined(__GNUC__) && ( defined(i386) || defined(__x86_64__) )
__asm__ (
" movl %%ebx,%%edi\n"
" xorl %%eax,%%eax # Set up for CPUID instruction \n"
@@ -139,7 +159,7 @@
static __inline__ int CPU_getCPUIDFeaturesExt()
{
int features = 0;
-#if defined(__GNUC__) && defined(i386)
+#if defined(__GNUC__) && (defined(i386) || defined (__x86_64__) )
__asm__ (
" movl %%ebx,%%edi\n"
" movl $0x80000000,%%eax # Query for extended functions \n"