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RSQ opcode requires replicate swizzle.
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icculus committed Jul 20, 2020
1 parent 42cf2e1 commit 478b7df
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Showing 3 changed files with 10 additions and 2 deletions.
6 changes: 6 additions & 0 deletions mojoshader.c
Expand Up @@ -1504,6 +1504,12 @@ static void state_RCP(Context *ctx)
fail(ctx, "RCP without replicate swizzle");
} // state_RCP

static void state_RSQ(Context *ctx)
{
if (!replicate_swizzle(ctx->source_args[0].swizzle))
fail(ctx, "RSQ without replicate swizzle");
} // state_RSQ

static void state_LOOP(Context *ctx)
{
if (ctx->source_args[0].regtype != REG_TYPE_LOOP)
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3 changes: 2 additions & 1 deletion mojoshader_assembler.c
Expand Up @@ -1254,7 +1254,8 @@ static int parse_instruction_token(Context *ctx, Token token)
ctx->tokenbufpos = 0;
ctx->default_writemask = instruction->default_writemask;

if (opcode == OPCODE_RCP) // RCP has an implicit swizzle of .xxxx if not specified.
// RCP and RSQ have an implicit swizzle of .xxxx if not specified.
if ((opcode == OPCODE_RCP) || (opcode == OPCODE_RSQ))
ctx->default_swizzle = 0; // .xxxx replicate swizzle.

const int tokcount = instruction->parse_args(ctx);
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3 changes: 2 additions & 1 deletion mojoshader_internal.h
Expand Up @@ -413,6 +413,7 @@ void buffer_patch(Buffer *buffer, const size_t start,

// we need to reference these by explicit value occasionally...
#define OPCODE_RCP 6
#define OPCODE_RSQ 7
#define OPCODE_RET 28
#define OPCODE_IF 40
#define OPCODE_IFC 41
Expand Down Expand Up @@ -781,7 +782,7 @@ INSTRUCTION(SUB, "SUB", 1, DSS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION(MAD, "MAD", 1, DSSS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION(MUL, "MUL", 1, DSS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION_STATE(RCP, "RCP", 1, DS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION(RSQ, "RSQ", 1, DS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION_STATE(RSQ, "RSQ", 1, DS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION(DP3, "DP3", 1, DSS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION_STATE(DP4, "DP4", 1, DSS, MOJOSHADER_TYPE_ANY, 0xF)
INSTRUCTION(MIN, "MIN", 1, DSS, MOJOSHADER_TYPE_ANY, 0xF)
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